CMOS Imaging

Let’s now consider image and video quality metrics and the properties of the image
bandwidth we are creating by adding CMOS imaging to digital cellular handsets.
Handsets are being designed to integrate digital cameras and high-definition, highcolor
depth displays. The handset hardware changes the shape and property of the
traffic offered to the network, and the RF and baseband performance required is a consequence
of the image bandwidth captured by the device.

Image bandwidth is determined by the choice of image capture technologies: charge
coupled device (CCD) or complementary metal-oxide on silicon (CMOS), as shown in
Table 4.2. CCD provides better resolution and more dynamic range (able to work in
low-light conditions). Very low fixed pattern noise means a CCD device can take
acceptable black-and-white photographs in a completely dark-to-the-human-eye
room. The disadvantage of the CCD in digital cellular phones is that it needs multiple
voltages, uses more power, and costs more.
CMOS sensors provide less resolution (typically hundreds of thousands of pixels
rather than several million). Therefore, megapixel images possible with CCD have relatively
high fixed pattern noise and do not work as well in low-light conditions. The
advantages of CMOS devices are that they do not need multiple voltages, use less
power, and cost less than CCD devices.
To give some present examples, a typical digital camera from Sony using CCD can
take 1.6, 2.1, or 3.3 megapixel images and can capture 2500 images on a battery charge.
A 12-bit ADC gives wide dynamic range; the display can either be a 4.3 or 3.2 aspect
ratio. The camera has a digital zoom, can resize stored images, and has an MPEG-4
movie mode for capturing and e-mailing 60 seconds of moving images (MPEG stands
for Moving Pictures Experts Group). An equivalent product from HP provides 2.24
megapixel resolution and 36-bit color depth (to get you to buy that extra-expensive
printer!). CMOS image sensors are less ambitiously specified. The most common variants
are typically 100,000 pixel devices (352 horizontal and 288 vertical pixels).
An example product from Toshiba can deliver 15 common intermediate format
(CIF) frames a second and consumes under 50 mW (five times less than an equivalent
CCD product). A DSP is used to double sample the image. Double sampling helps
reduce temporal noise and minimize the effects of transistor mismatch. The device
uses a 10-bit ADC and runs on a 2.8-V supply. Image lag is reduced by doping the
diode transfer switch interface.
Most of the work presently under way on the optimization of CMOS devices is
focused on integrating external circuitry to reduce fixed-pattern noise and to improve
dynamic range. (A sensor array dynamic range of 68 dB would be a typically achievable
figure.) Sensitivity is measured in V/lux/second. A typical achievable sensitivity
figure would be 0.52 v/lux/second.

A useful feature of CMOS imaging is the ability to fine-tune resolution, frame rate,
and color depth. Table 4.3 shows how this can be resolved into trading-off frame rate
against color depth and clock processor speed (power budget). Let’s take a 1280 × 1024
pixel image, for example. Afast-moving scene may need an 18 frame per second frame
rate. This can be achieved by reducing the color depth from 10 bits to 8 bits and increasing
the clock from 16 MHz to 32 MHz. As frame rate increases, our ability to perceive
color depth decreases, so effectively, the faster frame rate hides loss of color resolution. 116