Correlation

As we have described, optimum receive performance (BER) is dependent on the synchronous
application of the despreading code to the received signal. Nonsynchronicity
in the RAKE despreading process can be due to the random phase effects in the propagation
path, accuracy and stability of the handset reference, and Doppler effects.
The process outlined in the previous section is capable of providing despreading
alignment to an accuracy of one chip; however, this is not sufficient for low-BER, best
demodulation. An accuracy of 1/8 chip or better is considered necessary for optimum
performance.
As DSP/FPGA functions become increasingly power-efficient, greater use will be
made of digital techniques (for example, digital filters) to address these requirements
of fractional bit synchronization. Currently, methods employing delay lock loop (DLL)
configurations are used to track and determine the received signal and despread code
phase (see Figure 3.18). Code tracking can be achieved by the DLL tracking of PN signals.
The principle of the DLL as an optimal device for tracking the delay difference between the acquired and the local sequence is very similar to that of the PLL that is
used to track the frequency/phase of the carrier. Code tracking loops perform either
coherently—that is, they have knowledge of the carrier phase—or noncoherently—
that is, they do not have knowledge of the carrier phase.
Two separate correlators are used, each with a separate code generator. One correlator
is referred to as the early correlator and has a code reference waveform that is
advanced in time (phase) by a fraction of a chip; the other correlator is the late correlator
and is delayed but some fraction of a chip. The difference, or imbalance, between
the correlations is indicative of the difference between the despread code timing and
the received signal code.
The output signal e(τ) is the correction signal that is used to drive the PN generator
clock (VCO or NCO—if digital). A third PN on time sequence can be generated from
this process to be applied to an on-time correlator, or the correction could be applied to
adjust the TCXO reference for synchronization.
A practical modification is usually applied to the DLL as described. The problem to
be overcome is that of imbalance between the two correlators. Any imbalance will
cause the loops to settle in an off-center condition—that is, not in synch. This is overcome
by using the tau-dither early-late tracking loop.
The tau-dither loop uses one deciding correlator, one code generator, and a single
loop, but it has the addition of a phase switch function to switch between an early and
late phase—that is, advance and delay for the PN code tuning. In this way imbalance
is avoided in the timing/synchronizing process, since all components are common to
both early and late phases.