MPEG-4 Decoders

We have already covered MPEG-4 briefly earlier in this chapter when we compared
hardware and software realization options. Let’s revisit the topic, this time focusing
specifically on power budgets.
In Chapter 1 we described how, in common with speech codecs, image and video
codecs perform a discrete cosine transform to capture the frequency coefficients of the
quantized waveform. The DCT/quantizer and the way the information is presented
and multiplexed out of the encoder is prescribed by the MPEG-4 standard. (DCT
stands for Discrete Cosine Transform.) Other encoding tasks are left to the codec
designer, which means they can be optimized without reference to the standard.
Figure 4.9 shows a block diagram of a low-power MPEG-4 encoder/decoder from
Toshiba. It features a display interface, camera interface, multiplexer (to manage multiple
simultaneous image, video, and data streams prior to multiplexing onto single or
multiple code streams on the radio channel), and a video codec hardware block with a
Reduced Instruction Set Computing (RISC) processor, Direct Memory Access (DMA)
hardware (for optimizing memory fetch routing), and an audio encoder.
The device will simultaneously encode/decode a QCIF (Quarter Common Intermediate
Format) video stream at 15 frames per second. It uses Toshiba’s variable-threshold
CMOS on a 0.25 μm chip with integrated 16-Mbit DRAM and three 16-bit RISC processors.
The whole device runs at 60 MHz and consumes 240 mW.

The blocks in white show the MPEG-4-compliant DCT/quantizer and the way the bit
stream is delivered with a packet header, the picture type (for example, QCIF), the type
of block coding used, the timestamp, and the data itself (the frequency coefficients and
motion vectors). Other white blocks are the multiplexer and audio codec. Blocks in
gray show the preprocessor where temporal noise reduction is done, motion estimation
and compensation, rate control (fixed rate or variable rate), and the bit stream
encoder, where vendor-specific error protection encoding is added.
On the receive path the audio decoder, demultiplexer, depacketizer, motion compensation,
and DCT/quantizer are all MPEG-4-compliant (see Figure 4.11). The channel
decoding (bit stream decoder) and post processor are vendor-specific. The
implications of this are that codec performance will vary between vendors and will
depend on how much pre- and post-processing is done, which will determine processor
overhead and codec power consumption. It remains to be seen how well codecs
from different manufacturers will work together.
At present, the MPEG-4 profile supports 4- to 12-bit color depth, but longer-term
profiles will be extended to include 24- or possibly 32-bit color depth, which will need
to be accommodated by the encoder. The profiles also describe picture size; CIF (Common
Intermediate Format) and the previously mentioned QCIF (Quarter Size Common
Intermediate Format) are called “common” because they can be scaled down
from National Television Standards Committee (NTSC) and Phase Alternating Line
(PAL) images. As screen size reduces, resolution increases. High-resolution small
screens often look bigger than lower-resolution bigger screens. 133